interface mpi_interface(
	input bit clk,
	input bit rst_n);
	
	parameter SETUP_TIME = 1ns;
	parameter HOLD_TIME = 1ns;
	
	logic mpi_rdy_n;
	logic mpi_cs_n;
	logic mpi_rd_n;
	logic mpi_we_n;
	logic[15:0] mpi_addr;
	wire [31:0] mpi_data;
	
	clocking drv_cb @(posedge clk);
		default input #SETUP_TIME output #HOLD_TIME;
		input  mpi_rdy_n;
		output mpi_cs_n;
		output mpi_rd_n;
		output mpi_we_n;
		output mpi_addr;
		inout  mpi_data;
	endclocking: drv_cb
	
	modport drv_mp (clocking drv_cb);
	
endinterface: mpi_interface
